[PATCH V2] riscv: set trap vector earlier

[yang.zhang]

At 2024-05-07 13:28:58, "Alexandre Ghiti" <alex at ghiti.fr> wrote:
>Hi Yang,
>
>On 06/05/2024 04:22, yang.zhang wrote:
>> From: "yang.zhang" <yang.zhang at hexintek.com>
>>
>> If trap earlier, trap vector doesn't yet set properly, current
>> value maybe set by previous firmwire, typically it's the _start of kernel,
>> it's confused and difficult to debuge, so set it earlier.
>
>
>What about:
>
>"The exception vector of the booting hart is not set before enabling the 
>mmu and then still points to the value of the previous firmware, 
>typically _start_kernel. That makes it hard to debug setup_vm() when bad 
>things happen. So fix that by setting the exception vector earlier."

Hi alex:
Maybe "typically _start" not "typically _start_kernel", right?
Thanks for your help。
>> ---
>> v1 -> v2:
>> As Alex commented, remove the patch for supporting hugesize kernek image
>> Add the omissive logic of set trap vector earlier
>>
>> Signed-off-by: yang.zhang <yang.zhang at hexintek.com>
>> ---
>>   arch/riscv/kernel/head.S | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
>> index 4236a69c35cb..03dc440e643e 100644
>> --- a/arch/riscv/kernel/head.S
>> +++ b/arch/riscv/kernel/head.S
>> @@ -300,6 +300,9 @@ SYM_CODE_START(_start_kernel)
>>   #else
>>   	mv a0, a1
>>   #endif /* CONFIG_BUILTIN_DTB */
>> +	/* Set trap vector to spin forever to help debug */
>> +	la a3, .Lsecondary_park
>> +	csrw CSR_TVEC, a3
>>   	call setup_vm
>>   #ifdef CONFIG_MMU
>>   	la a0, early_pg_dir
>
>Note that this patch will allow to catch any exception happening in 
>setup_vm() but as we reset stvec in relocate_enable_mmu. But that's ok, 
>it will help catching weird bugs more easily :)
>
>With the commit message fixed, you can add:
>
>Reviewed-by: Alexandre Ghiti <alexghiti at rivosinc.com>
>
>Thanks,
>
>Alex