[PATCH v1 2/5] dt-bindings: gpio: mpfs: add coreGPIO support

Bartosz Golaszewski brgl at bgdev.pl
Fri Mar 29 03:28:53 PDT 2024


On Wed, Mar 27, 2024 at 1:25 PM Conor Dooley <conor at kernel.org> wrote:
>
> From: Jamie Gibbons <jamie.gibbons at microchip.com>
>
> The GPIO controllers on PolarFire SoC were based on the "soft" IP
> CoreGPIO, but the inp/outp registers are at different offsets. Add
> compatible to allow for support of both sets of offsets. The soft
> core will not always have interrupts wired up, so only enforce them for
> the "hard" core on PolarFire SoC.
>
> Signed-off-by: Jamie Gibbons <jamie.gibbons at microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---

Applied, thanks!

Bart



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