[RFC PATCH 1/9] dt-bindings: riscv: Add pointer masking ISA extensions
Samuel Holland
samuel.holland at sifive.com
Tue Mar 19 14:58:27 PDT 2024
The RISC-V Pointer Masking specification defines three extensions:
Smmpm, Smnpm, and Ssnpm. Document the behavior as of the current draft
of the specification, which is version 0.8.4.
Signed-off-by: Samuel Holland <samuel.holland at sifive.com>
---
.../devicetree/bindings/riscv/extensions.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 63d81dc895e5..bb7d5d84f31f 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -128,6 +128,18 @@ properties:
changes to interrupts as frozen at commit ccbddab ("Merge pull
request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
+ - const: smmpm
+ description: |
+ The standard Smmpm extension for M-mode pointer masking as defined
+ at commit a1e68469c60 ("Minor correction to pointer masking spec.")
+ of riscv-j-extension.
+
+ - const: smnpm
+ description: |
+ The standard Smnpm extension for next-mode pointer masking as defined
+ at commit a1e68469c60 ("Minor correction to pointer masking spec.")
+ of riscv-j-extension.
+
- const: smstateen
description: |
The standard Smstateen extension for controlling access to CSRs
@@ -147,6 +159,12 @@ properties:
and mode-based filtering as ratified at commit 01d1df0 ("Add ability
to manually trigger workflow. (#2)") of riscv-count-overflow.
+ - const: ssnpm
+ description: |
+ The standard Ssnpm extension for next-mode pointer masking as defined
+ at commit a1e68469c60 ("Minor correction to pointer masking spec.")
+ of riscv-j-extension.
+
- const: sstc
description: |
The standard Sstc supervisor-level extension for time compare as
--
2.43.1
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