[PATCH v9 03/10] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller
Thomas Gleixner
tglx at linutronix.de
Tue Mar 12 07:28:04 PDT 2024
On Tue, Mar 12 2024 at 07:23, Palmer Dabbelt wrote:
> On Fri, 23 Feb 2024 01:06:44 PST (-0800), tglx at linutronix.de wrote:
>> Contains:
>>
>> f4cc33e78ba8 ("irqchip/riscv-intc: Introduce Andes hart-level interrupt controller")
>> 96303bcb401c ("irqchip/riscv-intc: Allow large non-standard interrupt number")
>>
>> on top of v6.8-rc1
>
> Sorry I missed this. I just merged this into my testing tree, it might
> take a bit to show up because I've managed to break my VPN so I can't
> poke the tester box right now...
Alternatively you can just rebase on Linus tree. The interrupt changes
are already merged.
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