[PATCH v4 3/3] dt-bindings: PCI: microchip,pcie-host: allow dma-noncoherent
Rob Herring (Arm)
robh at kernel.org
Mon Jun 24 12:38:58 PDT 2024
On Fri, 21 Jun 2024 12:29:15 +0100, daire.mcnamara at microchip.com wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> PolarFire SoC may be configured in a way that requires non-coherent DMA
> handling. On RISC-V, buses are coherent by default & the dma-noncoherent
> property is required to denote buses or devices that are non-coherent.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> Signed-off-by: Daire McNamara <daire.mcnamara at microchip.com>
> ---
> Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh at kernel.org>
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