[RFC PATCH v2 01/10] iommu/riscv: add RISC-V IOMMU PMU support
Jason Gunthorpe
jgg at ziepe.ca
Mon Jun 17 07:55:21 PDT 2024
On Fri, Jun 14, 2024 at 10:21:47PM +0800, Zong Li wrote:
> This patch implements the RISC-V IOMMU hardware performance monitor, it
> includes the counting ans sampling mode.
>
> Specification doesn't define the event ID for counting the number of
> clock cycles, there is no associated iohpmevt0. But we need an event for
> counting cycle in perf, reserve the maximum number of event ID for it now.
Why is this part of the nesting series?
Jason
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