[PATCH v2 2/2] riscv: dts: sophgo: Add i2c device support for sg2042
Chen Wang
unicorn_wang at outlook.com
Tue Jul 30 00:59:35 PDT 2024
On 2024/7/29 10:13, Inochi Amaoto wrote:
> The i2c ip of sg2042 is a standard Synopsys i2c ip, which is already
> supported by the mainline kernel.
>
> Add i2c device node for sg2042.
>
> Signed-off-by: Inochi Amaoto <inochiama at outlook.com>
Reviewed-by: Chen Wang <unicorn_wang at outlook.com>
Tested-by: Chen Wang <unicorn_wang at outlook.com>
> ---
> arch/riscv/boot/dts/sophgo/sg2042.dtsi | 52 ++++++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> index c61d8061119d..eebd6817520e 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> @@ -47,6 +47,58 @@ soc: soc {
> interrupt-parent = <&intc>;
> ranges;
>
> + i2c0: i2c at 7030005000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30005000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C0>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c at 7030006000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30006000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C1>;
> + status = "disabled";
> + };
> +
> + i2c2: i2c at 7030007000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30007000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <103 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C2>;
> + status = "disabled";
> + };
> +
> + i2c3: i2c at 7030008000 {
> + compatible = "snps,designware-i2c";
> + reg = <0x70 0x30008000 0x0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_APB_I2C>;
> + clock-names = "ref";
> + clock-frequency = <100000>;
> + interrupts = <104 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_I2C3>;
> + status = "disabled";
> + };
> +
> pllclk: clock-controller at 70300100c0 {
> compatible = "sophgo,sg2042-pll";
> reg = <0x70 0x300100c0 0x0 0x40>;
> --
> 2.45.2
>
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