[PATCH v4] RISC-V: Provide the frequency of time CSR via hwprobe

[Punit Agrawal]

Punit Agrawal <punit.agrawal at bytedance.com> writes:

> Hi,
>
> Yunhui Cui <cuiyunhui at bytedance.com> writes:
>
>> From: Palmer Dabbelt <palmer at rivosinc.com>
>>
>> The RISC-V architecture makes a real time counter CSR (via RDTIME
>> instruction) available for applications in U-mode but there is no
>> architected mechanism for an application to discover the frequency
>> the counter is running at. Some applications (e.g., DPDK) use the
>> time counter for basic performance analysis as well as fine grained
>> time-keeping.
>>
>> Add support to the hwprobe system call to export the time CSR
>> frequency to code running in U-mode.
>>
>> Signed-off-by: Palmer Dabbelt <palmer at rivosinc.com>
>> Signed-off-by: Yunhui Cui <cuiyunhui at bytedance.com>
>> Reviewed-by: Evan Green <evan at rivosinc.com>
>> Reviewed-by: Anup Patel <anup at brainfault.org>
>> Acked-by: Punit Agrawal <punit.agrawal at bytedance.com>
>> ---
>>  Documentation/arch/riscv/hwprobe.rst  | 2 ++
>>  arch/riscv/include/asm/hwprobe.h      | 2 +-
>>  arch/riscv/include/uapi/asm/hwprobe.h | 1 +
>>  arch/riscv/kernel/sys_hwprobe.c       | 5 +++++
>>  4 files changed, 9 insertions(+), 1 deletion(-)
>
> The commit looks ready to be merged. Will this picked up for the 6.11
> release?
>
> Once this is merged, we can send out the DPDK change relying on the
> newly added key.

I see the first part of RISC-V patches got merged for 6.11. Any chance
for this patch to still make it for this cycle?