[PATCH v4 0/4] Add board support for Sipeed LicheeRV Nano
Chen Wang
unicorn_wang at outlook.com
Fri Jul 12 17:13:50 PDT 2024
On 2024/7/12 22:15, Conor Dooley wrote:
> On Fri, Jul 12, 2024 at 09:33:46AM +0800, Chen Wang wrote:
>>> .../interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
>>> .../devicetree/bindings/riscv/sophgo.yaml | 5 ++
>>> arch/riscv/boot/dts/sophgo/Makefile | 1 +
>>> .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 54 ++++++++++++++++++++++
>>> arch/riscv/boot/dts/sophgo/sg2002.dtsi | 32 +++++++++++++
>>> 5 files changed, 93 insertions(+)
>> How about letting me PR all the four patches in this patchset? Because they
>> are all related to sophgo, it would be better to PR them together to avoid
>> confusion.
>> Especially about the change of sifive,plic-1.0.0.yaml, my original
>> understanding was that it should be handled by you.
> No, stuff like the plic should really be handled by Thomas as he is the
> interrupt controller maintainer, not by me. Usually though, neither the
> timer or interrupt controller maintainers seem to care about these sorts
> of binding patches which is why they ended up going with the dts.
> Ideally the plic patch would go through the tip tree, but I think
> there's unlikely to be sleep lost over a trivial binding change going
> with the dts user.
Thank you Cornor for your input, I will handle these patches together
with dts.
Regards,
Chen
More information about the linux-riscv
mailing list