[PATCH 3/3] riscv: dts: sophgo: Add SARADC configuration

[Krzysztof Kozlowski]

On 02/07/2024 13:52, Thomas Bonnefille wrote:
> Adds SARADC nodes for the common Successive Approximation Analog to
> Digital Converter used in Sophgo SoC.
> This patch adds nodes for the two SARADCs presents on the board, one in
> the Active domain and the other in the No-Die domain.

You are duplicating the first sentence or this does not make sense...

> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille at bootlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 7247c7c3013c..0b996aa7fa31 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -309,5 +309,19 @@ clint: timer at 74000000 {
>  			reg = <0x74000000 0x10000>;
>  			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
>  		};
> +
> +		saradc_active: adc at 30f0000 {

Please look at DTS coding style about ordering of nodes.

Best regards,
Krzysztof