[PATCH v3 3/4] riscv: dts: add reset generator for Sophgo SG2042 SoC
Chen Wang
unicornxw at gmail.com
Mon Jan 29 17:50:32 PST 2024
From: Chen Wang <unicorn_wang at outlook.com>
Add reset generator node to device tree for SG2042.
Signed-off-by: Chen Wang <unicorn_wang at outlook.com>
---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index ead1cc35d88b..eeb341e16bfd 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -6,6 +6,8 @@
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset/sophgo,sg2042-reset.h>
+
#include "sg2042-cpus.dtsi"
/ {
@@ -327,6 +329,12 @@ intc: interrupt-controller at 7090000000 {
riscv,ndev = <224>;
};
+ rstgen: reset-controller at 7030013000 {
+ compatible = "sophgo,sg2042-reset";
+ reg = <0x00000070 0x30013000 0x00000000 0x0000000c>;
+ #reset-cells = <1>;
+ };
+
uart0: serial at 7040000000 {
compatible = "snps,dw-apb-uart";
reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
--
2.25.1
More information about the linux-riscv
mailing list