[External] Re: [PATCH] RISC-V: add uniprocessor flush_tlb_range() support

[yunhui cui]

Hi Prabhakar,

On Sat, Jan 27, 2024 at 1:42 AM Lad, Prabhakar
<prabhakar.csengg at gmail.com> wrote:
>
> On Thu, Jan 25, 2024 at 6:23 AM Yunhui Cui <cuiyunhui at bytedance.com> wrote:
> >
> > Add support for flush_tlb_range() to improve TLB performance for
> > UP systems. In order to avoid the mutual inclusion of tlbflush.h
> > and hugetlb.h, the UP part is also implemented in tlbflush.c.
> >
> > Signed-off-by: Yunhui Cui <cuiyunhui at bytedance.com>
> > ---
> >  arch/riscv/include/asm/tlbflush.h |  61 ++++++----
> >  arch/riscv/mm/Makefile            |   2 +-
> >  arch/riscv/mm/tlbflush.c          | 195 ++++++++++++++++++------------
> >  3 files changed, 156 insertions(+), 102 deletions(-)
> >
> Boot tested with defconfig + rz/five enabled, no issues seen on
> RZ/Five SMARC EVK.
>
> Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
>

Thank you for testing !

Thanks，
Yunhui