[PATCH] clocksource: timer-riscv: Clear timer interrupt on timer initialization

[Leyfoon Tan]

> -----Original Message-----
> From: Anup Patel <apatel at ventanamicro.com>
> Sent: Friday, January 26, 2024 1:00 AM
> To: Leyfoon Tan <leyfoon.tan at starfivetech.com>
> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>; Thomas Gleixner
> <tglx at linutronix.de>; Palmer Dabbelt <palmer at dabbelt.com>; Paul Walmsley
> <paul.walmsley at sifive.com>; Albert Ou <aou at eecs.berkeley.edu>;
> atishp at rivosinc.com; linux-riscv at lists.infradead.org; linux-
> kernel at vger.kernel.org; Ley Foon Tan <lftan.linux at gmail.com>
> Subject: Re: [PATCH] clocksource: timer-riscv: Clear timer interrupt on timer
> initialization
> 
> On Thu, Jan 25, 2024 at 10:25 PM Ley Foon Tan
> <leyfoon.tan at starfivetech.com> wrote:
> >
> > In the RISC-V specification, the stimecmp register doesn't have a
> > default value. To prevent the timer interrupt from being triggered
> > during timer initialization, clear the timer interrupt by writing
> > stimecmp with a maximum value.
> >
> > Signed-off-by: Ley Foon Tan <leyfoon.tan at starfivetech.com>
> > ---
> >  drivers/clocksource/timer-riscv.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/clocksource/timer-riscv.c
> > b/drivers/clocksource/timer-riscv.c
> > index e66dcbd66566..a75a74647344 100644
> > --- a/drivers/clocksource/timer-riscv.c
> > +++ b/drivers/clocksource/timer-riscv.c
> > @@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void)
> >
> >         sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
> >
> > +       /* Clear timer interrupt */
> > +       riscv_clock_event_stop();
> > +
> 
> The riscv_timer_init_common() is called only on boot HART.
> 
> I suggest doing riscv_clock_event_stop() in riscv_timer_starting_cpu() just
> before enable_percpu_irq().
> 
> I also suggest adding an appropriate Fixes tag in the commit description.
> 
> Regards,
> Anup
> 

Okay, will change it.

Thanks.

Regards
Ley Foon