[v11, 00/10] riscv: support kernel-mode Vector

[Andy Chiu]

This series provides support running Vector in kernel mode.
Additionally, kernel-mode Vector can be configured to run without
turnning off preemption on a CONFIG_PREEMPT kernel. Along with the
suport, we add Vector optimized copy_{to,from}_user. And provide a
simple threshold to decide when to run the vectorized functions.

We decided to drop vectorized memcpy/memset/memmove for the moment due
to the concern of memory side-effect in kernel_vector_begin(). The
detailed description can be found at v9[0]

This series is composed by 4 parts:
 patch 1-4: adds basic support for kernel-mode Vector
 patch 5: includes vectorized copy_{to,from}_user into the kernel
 patch 6: refactor context switch code in fpu [1]
 patch 7-10: provides some code refactors and support for preemptible
             kernel-mode Vector.

This series can be merged if we feel any part of {1~4, 5, 6, 7~10} is
mature enough.

This patch is tested on a QEMU with V and verified that booting, normal
userspace operations all work as usual with thresholds set to 0. Also,
we test by launching multiple kernel threads which continuously executes
and verifies Vector operations in the background. The module that tests
these operation is expected to be upstream later.

v10 of this series can be found at [2]

[0]https://lore.kernel.org/all/20231229143627.22898-1-andy.chiu@sifive.com/
[1]https://lore.kernel.org/all/CABgGipX7Jf7M8ZYgeRPcE9tkzc7XWpfWErsiacn2Pa9h=vG2cQ@mail.gmail.com/T/
[2]https://lore.kernel.org/all/20240111131558.31211-1-andy.chiu@sifive.com/

Patch summary:
 - Updated patches: 5, 9
 - New patch: (none)
 - Unchanged patch: 1, 2, 3, 4, 6, 7, 8, 10
 - Deleted patch: (none)

Changelog v11:
 - This is a quick respin to address boot failing on ubuntu and alpine.
 - Pass the updated copy size when calling scalar fallback.
 - Skip some bytes for scalar fallback when fauting at vse8.v with a
   non-zero $vstart. (Guo)
 - Guard riscv_v_setup_ctx_cache() with  has_vector() check.

Changelog v10:
 - Refactor comments (1), Eric
 - Remove duplicate assembly code (5), Charlie
 - Optimize unnecessary compiler barriers in preempt_v (10)
 - Address bugs in context-saving for preempt_v (10)
 - Correct dirty marking/clearing code for preempt_v (10)

Changelog v9:
 - Use one bit to record the on/off status of kernel-mode Vector
 - Temporarily drop vectorized mem* functions
 - Add a patch to refactor context switch in fpu
 - silence lockdep and use WARN_ON instead

Changelog v8:
 - Address build fail on no-mmu config
 - Fix build fail with W=1
 - Refactor patches (1, 2), Eric

Changelog v7:
 - Fix build fail for allmodconfig and test building the series with
   allmodconfig/allyesconfig

Changelog v6:
 - Provide a more robust check on the use of non-preemptible Vector.
 - Add Kconfigs to set threshold value at compile time. (Charlie)
 - Add a patch to utilize kmem_cache_* for V context allocations.
 - Re-write and add preemptible Vector.

Changelog v5:
 - Rebase on top of riscv for-next (6.7-rc1)
Changelog v4:
 - Use kernel_v_flags and helpers to track vector context.
 - Prevent softirq from nesting V context for non-preempt V
 - Add user copy and mem* routines

Changelog v3:
 - Rebase on top of riscv for-next (6.6-rc1)
 - Fix a build issue (Conor)
 - Guard vstate_save, vstate_restore with {get,put}_cpu_vector_context.
 - Save V context after disabling preemption. (Guo)
 - Remove irqs_disabled() check from may_use_simd(). (Björn)
 - Comment about nesting V context.

Changelog v2:
 - fix build issues
 - Follow arm's way of starting kernel-mode simd code:
   - add include/asm/simd.h and rename may_use_vector() ->
     may_use_simd()
   - return void in kernel_vector_begin(), and BUG_ON if may_use_simd()
     fails
 - Change naming scheme for functions/macros (Conor):
   - remove KMV
   - 's/rvv/vector/'
   - 's/RISCV_ISA_V_PREEMPTIVE_KMV/RISCV_ISA_V_PREEMPTIVE/'
   - 's/TIF_RISCV_V_KMV/TIF_RISCV_V_KERNEL_MODE/'

Andy Chiu (8):
  riscv: vector: make Vector always available for softirq context
  riscv: sched: defer restoring Vector context for user
  riscv: lib: vectorize copy_to_user/copy_from_user
  riscv: fpu: drop SR_SD bit checking
  riscv: vector: do not pass task_struct into
    riscv_v_vstate_{save,restore}()
  riscv: vector: use a mask to write vstate_ctrl
  riscv: vector: use kmem_cache to manage vector context
  riscv: vector: allow kernel-mode Vector with preemption

Greentime Hu (2):
  riscv: Add support for kernel mode vector
  riscv: Add vector extension XOR implementation

 arch/riscv/Kconfig                      |  22 +++
 arch/riscv/include/asm/asm-prototypes.h |  27 +++
 arch/riscv/include/asm/entry-common.h   |  17 ++
 arch/riscv/include/asm/processor.h      |  41 +++-
 arch/riscv/include/asm/simd.h           |  64 ++++++
 arch/riscv/include/asm/switch_to.h      |   3 +-
 arch/riscv/include/asm/thread_info.h    |   2 +
 arch/riscv/include/asm/vector.h         |  90 +++++++--
 arch/riscv/include/asm/xor.h            |  68 +++++++
 arch/riscv/kernel/Makefile              |   1 +
 arch/riscv/kernel/entry.S               |   8 +
 arch/riscv/kernel/kernel_mode_vector.c  | 247 ++++++++++++++++++++++++
 arch/riscv/kernel/process.c             |  13 +-
 arch/riscv/kernel/ptrace.c              |   7 +-
 arch/riscv/kernel/signal.c              |   7 +-
 arch/riscv/kernel/vector.c              |  53 ++++-
 arch/riscv/lib/Makefile                 |   7 +-
 arch/riscv/lib/riscv_v_helpers.c        |  45 +++++
 arch/riscv/lib/uaccess.S                |  10 +
 arch/riscv/lib/uaccess_vector.S         |  53 +++++
 arch/riscv/lib/xor.S                    |  81 ++++++++
 21 files changed, 838 insertions(+), 28 deletions(-)
 create mode 100644 arch/riscv/include/asm/simd.h
 create mode 100644 arch/riscv/include/asm/xor.h
 create mode 100644 arch/riscv/kernel/kernel_mode_vector.c
 create mode 100644 arch/riscv/lib/riscv_v_helpers.c
 create mode 100644 arch/riscv/lib/uaccess_vector.S
 create mode 100644 arch/riscv/lib/xor.S

-- 
2.17.1