[PATCH v4 0/2] riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer at rivosinc.com>:

On Mon, 25 Dec 2023 12:42:05 +0800 you wrote:
> Some riscv implementations such as T-HEAD's C906, C908, C910 and C920
> support efficient unaligned access, for performance reason we want
> to enable HAVE_EFFICIENT_UNALIGNED_ACCESS on these platforms. To
> avoid performance regressions on non efficient unaligned access
> platforms, HAVE_EFFICIENT_UNALIGNED_ACCESS can't be globally selected.
> 
> To solve this problem, runtime code patching based on the detected
> speed is a good solution. But that's not easy, it involves lots of
> work to modify vairous subsystems such as net, mm, lib and so on.
> This can be done step by step.
> 
> [...]

Here is the summary with links:
  - [v4,1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS
    https://git.kernel.org/riscv/c/b6da6cbe13eb
  - [v4,2/2] riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW
    https://git.kernel.org/riscv/c/d0fdc20b0429

You are awesome, thank you!
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