[GIT PULL] KVM/riscv changes for 6.8 part #1

[Paolo Bonzini]

On Tue, Jan 9, 2024 at 7:02 AM Anup Patel <anup at brainfault.org> wrote:
> > > On Tue, Jan 02, 2024 at 07:24:26PM +0100, Paolo Bonzini wrote:
> > > > On Sun, Dec 31, 2023 at 6:33 AM Anup Patel <anup at brainfault.org> wrote:
> > > > > We have the following KVM RISC-V changes for 6.8:
> > > > > 1) KVM_GET_REG_LIST improvement for vector registers
> > > > > 2) Generate ISA extension reg_list using macros in get-reg-list selftest
> > > > > 3) Steal time account support along with selftest
> > > >
> > > > Just one small thing I noticed on (3), do you really need cpu_to_le64
> > > > and le64_to_cpu on RISC-V? It seems that it was copied from aarch64.
> > > > No need to resend the PR anyway, of course.
>
> Friendly ping ?

Hi, I had already pulled but I was waiting for the last x86 tests to
finish. Everything is now in kvm.git.

I'll send the PR to Linus once a bunch of conflicting trees have been pulled.

Paolo