[PATCH v3 0/2] Add Zawrs support and use it for spinlocks
Christoph Müllner
christoph.muellner at vrull.eu
Mon Jan 8 06:00:29 PST 2024
On Mon, Jan 8, 2024 at 12:35 PM Andrew Jones <ajones at ventanamicro.com> wrote:
>
> On Fri, Oct 20, 2023 at 12:19:38PM +0200, Andrea Parri wrote:
> > (Removing Heiko's @vrull address from Cc:, since it seemed to bounce, keeping
> > his @sntech address.)
> >
> > > I had a quick look at your changes, and they look good to me.
> >
> > Great. Thank you for looking them over.
> >
> > > Did you agree with Palmer about testing requirements?
> > > I.e., do we need to run this on hardware that implements Zawrs in a
> > > non-trivial way?
> >
> > I didn't quite discuss such specific requirements or hardware implementations,
> > but I agree that's a valid concern. Not that I currently have access to such
> > hardware; any further inputs/data will be appreciated.
> >
> > > I can try to raise the priority on this here, but can't promise anything.
> > > For me it is also ok if you take over this patchset.
> >
> > Thanks. Either way works for me. No urgency from my side. I'd say - let us
> > leave this up to the community/other reviewers. (IIUC, Palmer was recovering
> > from a certain flu and might need more time than usual to get back here.)
> >
>
> Hi everyone,
>
> I'm also interested in seeing this series resurrected and making progress
> again. I'd be happy to help out in any way. It's not clear to me if it has
> a current owner. If not, then I could start shepherding the patches with
> their authorships intact.
Sounds good to me!
Thanks for working on this!
>
> I may be able to do some testing on an FPGA too.
>
> Thanks,
> drew
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