Page Table A&D bits scheme

[Stefan O'Rear]

On Fri, Jan 5, 2024, at 4:33 AM, Alexandre Ghiti wrote:
> Hi Theo,
>
> On 05/01/2024 09:27, Theo Z wrote:
>> According to Privileged: 4.3.1 (p81)
>>
>> "Two schemes to manage the A and D bits are permitted:"
>>
>> * When a virtual page is accessed and the A bit is clear, or is 
>> written and the D bit is clear, a
>> page-fault exception is raised.
>
>
> At the moment, this is the only scheme that the kernel supports.

All versions of QEMU prior to 8.0.0 (released April 2023) implement the
second scheme exclusively, setting the A and D bits in PTEs automatically,
with no means for software to override.  Any kernel version which runs on
both pre-8.0.0 QEMU and hardware supports both schemes.

Support for RVA20 and later profiles requires scheme 1 to be in use at boot;
Svadu (as discussed) provides an RVA20-compatible opt-in for scheme 2, and
is supported by QEMU 8.0.0.

-s 

>>
>> * When a virtual page is accessed and the A bit is clear, or is 
>> written and the D bit is clear, the
>> implementation sets the corresponding bit(s) in the PTE
>
>
> This will be supported by the kernel when svadu support is merged in 
> the 
> kernel 
> (https://lore.kernel.org/linux-riscv/20231102120129.11261-1-yongxuan.wang@sifive.com/) 
> and in openSBI 
> (https://lists.infradead.org/pipermail/opensbi/2023-October/005768.html), 
> but it depends on openSBI FWFT extension.
>
>
>>
>> Which implementation does Linux is expected to work best with?
>>
>
> svadu will avoid a page fault so this will be the most performant 
> implementation.
>
>
>> (Unix kernel xv6 works with 2nd scheme only)
>>
>> Best regards,
>>
>> Theo Z
>>
>
> Thanks,
>
> Alex
>
>
>>
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