[PATCH -fixes 1/2] riscv: Fix enabling cbo.zero when running in M-mode

[patchwork-bot+linux-riscv at kernel.org]

Hello:

This series was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer at rivosinc.com>:

On Sun, 11 Feb 2024 18:26:14 -0800 you wrote:
> When the kernel is running in M-mode, the CBZE bit must be set in the
> menvcfg CSR, not in senvcfg.
> 
> Cc: stable at kernel.org
> Fixes: 43c16d51a19b ("RISC-V: Enable cbo.zero in usermode")
> Signed-off-by: Samuel Holland <samuel.holland at sifive.com>
> 
> [...]

Here is the summary with links:
  - [-fixes,1/2] riscv: Fix enabling cbo.zero when running in M-mode
    https://git.kernel.org/riscv/c/3fb3f7164edc
  - [-fixes,2/2] riscv: Save/restore envcfg CSR during CPU suspend
    (no matching commit)

You are awesome, thank you!
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