[PATCH -fixes v4 1/3] riscv: Fix enabling cbo.zero when running in M-mode

[Conor Dooley]

On Tue, Feb 27, 2024 at 10:55:33PM -0800, Samuel Holland wrote:
> When the kernel is running in M-mode, the CBZE bit must be set in the
> menvcfg CSR, not in senvcfg.
> 
> Cc: <stable at vger.kernel.org>
> Fixes: 43c16d51a19b ("RISC-V: Enable cbo.zero in usermode")
> Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
> Signed-off-by: Samuel Holland <samuel.holland at sifive.com>

Reviewed-by: Conor Dooley <conor.dooley at microchip.com>

Cheers,
Conor.
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