[PATCH v2 2/3] scripts: generate_rust_target: enable building on RISC-V

[Miguel Ojeda]

On Tue, Feb 27, 2024 at 1:37 PM Conor Dooley <conor.dooley at microchip.com> wrote:
>
> Looking closer at those targets, all of them enable compressed
> instructors, but we support hardware that does not support them.
> I think that means we are stuck with the custom targets.

Did you try `-Ctarget-feature=-c`? i.e. as far as I know, you can
disable target features even if they are enabled from the built-in.

It seems to work from a quick try (in userspace), e.g.

0000000000000000 <f>:
       0: 9b 05 05 00      sext.w    a1, a0
       4: 13 05 a0 02      li    a0, 0x2a
       8: 63 84 05 00      beqz    a1, 0x10 <f+0x10>
       c: 13 05 b0 07      li    a0, 0x7b
      10: 67 80 00 00      ret

vs.

0000000000000000 <f>:
       0: 9b 05 05 00      sext.w    a1, a0
       4: 13 05 a0 02      li    a0, 0x2a
       8: 99 c1            beqz    a1, 0xe <f+0xe>
       a: 13 05 b0 07      li    a0, 0x7b
       e: 82 80            ret

Cheers,
Miguel