[PATCH 1/3] dt-bindings: clock: Add bindings for Canaan K230 clock controller

[Xukai Wang]

This patch adds the Device Tree binding for the clock controller
on Canaan k230. The binding defines the new clocks available and
the required properties to configure them correctly.

Signed-off-by: Xukai Wang <kingxukai at zohomail.com>
---
 .../devicetree/bindings/clock/canaan,k230-clk.yaml | 41 ++++++++++++++++++
 include/dt-bindings/clock/k230-clk.h               | 49 ++++++++++++++++++++++
 2 files changed, 90 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml b/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..ffd4e0b052455bf3dcedd9355d93764119df3d68
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/canaan,k230-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Canaan Kendryte K230 Clock
+
+maintainers:
+  - Xukai Wang <kingxukai at zohomail.com>
+
+properties:
+  compatible:
+    const: canaan,k230-clk
+
+  clocks: 
+    const: 1
+
+  reg:
+    maxItems: 2
+    minItems: 1
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller at 91102000 {
+        compatible = "canaan,k230-clk";
+        reg = <0x91102000 0x1000>, <0x91100000 0x1000>;
+        #clock-cells = <1>;
+        clocks = <&osc24m>;
+    };
diff --git a/include/dt-bindings/clock/k230-clk.h b/include/dt-bindings/clock/k230-clk.h
new file mode 100644
index 0000000000000000000000000000000000000000..31d1f82fbcff654072ef1a8985a884377d801e72
--- /dev/null
+++ b/include/dt-bindings/clock/k230-clk.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Kendryte Canaan K230 Clock Drivers
+ *
+ * Author: Xukai Wang <kingxukai at zohomail.com>
+ */
+
+#ifndef CLOCK_K230_CLK_H
+#define CLOCK_K230_CLK_H
+
+/* Kendryte K230 SoC clock identifiers (arbitrary values). */
+#define	K230_CPU0_SRC			0
+#define	K230_CPU0_ACLK			1
+#define	K230_CPU0_PLIC			2
+#define	K230_CPU0_NOC_DDRCP4		3
+#define	K230_CPU0_PCLK			4
+#define	K230_PMU_PCLK			5
+#define	K230_HS_HCLK_HIGN_SRC		6
+#define	K230_HS_HCLK_HIGN_GATE		7
+#define	K230_HS_HCLK_SRC		8
+#define	K230_HS_SD0_HS_AHB_GAT		9
+#define	K230_HS_SD1_HS_AHB_GAT		10
+#define	K230_HS_SSI1_HS_AHB_GA		11
+#define	K230_HS_SSI2_HS_AHB_GA		12
+#define	K230_HS_USB0_HS_AHB_GA		13
+#define	K230_HS_USB1_HS_AHB_GA		14
+#define	K230_HS_SSI0_AXI15		15
+#define	K230_HS_SSI1			16
+#define	K230_HS_SSI2			17
+#define	K230_HS_QSPI_AXI_SRC		18
+#define	K230_HS_SSI1_ACLK_GATE		19
+#define	K230_HS_SSI2_ACLK_GATE		20
+#define	K230_HS_SD_CARD_SRC		21
+#define	K230_HS_SD0_CARD_TX		22
+#define	K230_HS_SD1_CARD_TX		23
+#define	K230_HS_SD_AXI_SRC		24
+#define	K230_HS_SD0_AXI_GATE		25
+#define	K230_HS_SD1_AXI_GATE		26
+#define	K230_HS_SD0_BASE_GATE		27
+#define	K230_HS_SD1_BASE_GATE		28
+#define	K230_HS_OSPI_SRC		29
+#define	K230_HS_USB_REF_50M		30
+#define	K230_HS_SD_TIMER_SRC		31
+#define	K230_HS_SD0_TIMER_GATE		32
+#define	K230_HS_SD1_TIMER_GATE		33
+#define	K230_HS_USB0_REFERENCE		34
+#define	K230_HS_USB1_REFERENCE		35
+
+#endif /* CLOCK_K230_CLK_H */

-- 
2.34.1