[External] Re: [PATCH] RISC-V: Enable Zicbom in usermode

[yunhui cui]

Hi drew，

On Thu, Dec 19, 2024 at 10:12 PM Andrew Jones <ajones at ventanamicro.com> wrote:
>
> On Fri, Oct 25, 2024 at 05:15:27PM +0800, Yunhui Cui wrote:
> > Like Zicboz, by enabling the corresponding bits of senvcfg,
> > the instructions cbo.clean, cbo.flush, and cbo.inval can be
> > executed normally in user mode.
> >
> > Signed-off-by: Yunhui Cui <cuiyunhui at bytedance.com>
> > ---
> >  arch/riscv/kernel/cpufeature.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > index 1992ea64786e..bc850518ab41 100644
> > --- a/arch/riscv/kernel/cpufeature.c
> > +++ b/arch/riscv/kernel/cpufeature.c
> > @@ -924,7 +924,7 @@ unsigned long riscv_get_elf_hwcap(void)
> >  void __init riscv_user_isa_enable(void)
> >  {
> >       if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICBOZ))
> > -             current->thread.envcfg |= ENVCFG_CBZE;
> > +             current->thread.envcfg |= ENVCFG_CBIE | ENVCFG_CBCFE | ENVCFG_CBZE;
> >       else if (any_cpu_has_zicboz)
> >               pr_warn("Zicboz disabled as it is unavailable on some harts\n");
> >  }
> > --
> > 2.39.2
> >
>
> Hi Yunhui,
>
> Do you plan to send a v2 of this?
>
> Thanks,
> drew

I will send v2 in the next few days. Thanks for the reminder.


Thanks，
Yunhui