[PATCH v2 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt controller

Chen Wang unicorn_wang at outlook.com
Wed Dec 11 01:12:50 PST 2024


On 2024/12/11 7:13, Samuel Holland wrote:
> On 2024-12-09 1:12 AM, Chen Wang wrote:
[......]
>> +
>> +static int sg2042_msi_allocate_hwirq(struct sg2042_msi_data *priv, int num_req)
>> +{
>> +	int first;
>> +
>> +	guard(mutex)(&priv->msi_map_lock);
>> +	first = bitmap_find_free_region(priv->msi_map, priv->num_irqs,
>> +					get_count_order(num_req));
>> +	return first >= 0 ? priv->irq_first + first : -ENOSPC;
> How does this work? The irqdomain is instantiated with size == priv->num_irqs,
> so hwirqs must be less than priv->num_irqs. It also quite simplifies the code
> for hwirq be a number between 0 and priv->num_irqs. You only need to apply the
> offset when allocating the parent IRQ:
>
> 	fwspec.param[0] = priv->irq_first + hwirq;

I will double check, seems this need to be improved.

Thanks,

Chen

[......]





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