[PATCH v1] riscv: dts: thead: Fix TH1520 emmc and shdci clock rate
Drew Fustini
drew at pdp7.com
Thu Dec 5 10:11:50 PST 2024
On Wed, Dec 04, 2024 at 03:19:28PM +0000, Emil Renner Berthing wrote:
> bigunclemax@ wrote:
> > From: Maksim Kiselev <bigunclemax at gmail.com>
> >
> > In accordance with LicheePi 4A BSP the clock that comes to emmc/sdhci
> > is 198Mhz.
> >
> > But changing from fixed-clock to CLK_EMMC_SDIO leads to increasing input
> > clock from 198Mhz to 792Mhz. Because the CLK_EMMC_SDIO is actually 792Mhz.
> >
> > Therefore calculation of output SDCLK is incorrect now.
> > The mmc driver sets the divisor to 4 times larger than it should be
> > and emmc/sd works 4 times slower.
> >
> > This can be confirmed with fio test:
> > Sequential read of emmc with fixed 198Mz clock:
> > READ: bw=289MiB/s (303MB/s)
> >
> > Sequential read with CLK_EMMC_SDIO clock:
> > READ: bw=82.6MiB/s (86.6MB/s)
> >
> > Let's fix this issue by providing fixed-factor-clock that divides
> > CLK_EMMC_SDIO by 4 for emmc/sd nodes.
>
> Thanks for finding this bug!
>
> However, this feels like a work-around for a bug in the clock driver, and even
> if there is a fixed factor divider somewhere this should probably be modelled
> by the clock driver. Did you look into the documentation[1] and try to figure
> out where eMMC clock comes from and where the /4 is missing?
>
> There is also a vendor tree somewhere with a much more complete clock driver.
> Drew do you remember where it is? Maybe it's worth looking at how that driver
> models the eMMC clocks.
Sorry for the delay, I'm travelling until tomorrow.
Maksim, thanks for finding this issue and sending a patch.
That is a good point about checking the thead vendor kernel. I normally
look at revy's thead-kernel repo [1] which is 5.10. revy also has a 6.6
lts branch in th1520-linux-kernel [2].
https://github.com/revyos/thead-kernel/tree/lpi4a/drivers/clk/thead
Looking at line 454 in drivers/clk/thead/clk-light-fm.c [3]:
clks[EMMC_SDIO_REF_CLK] =
thead_light_clk_fixed_factor("emmc_sdio_ref_clk",
"video_pll_foutpostdiv", 1, 4)
/* Note: base clk is div 4 to 198M*/
Which derives from line 373:
clks[VIDEO_PLL_FOUTPOSTDIV] =
thead_clk_fixed("video_pll_foutpostdiv", 792000000);
Thanks,
Drew
[1] https://github.com/revyos/thead-kernel
[2] https://github.com/revyos/th1520-linux-kernel
[3] https://github.com/revyos/thead-kernel/blob/lpi4a/drivers/clk/thead/clk-light-fm.c
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