[PATCH] riscv: mm: Fix alignment of phys_ram_base
Xu Lu
luxu.kernel at bytedance.com
Mon Dec 2 02:16:01 PST 2024
This commit fixes the alignment of phys_ram_base in RISC-V.
In sparse vmemmap model, the virtual address of vmemmap is calculated as:
'(struct page *)VMEMMAP_START - (phys_ram_base >> PAGE_SHIFT)'.
And the struct page's va can be calculated with an offset:
'vmemmap + (pfn)'.
However, when initializing struct pages, kernel actually starts from the
first page from the same section that phys_ram_base belongs to. If the
first page's physical address is not 'phys_ram_base >> PAGE_SHIFT', then
we get an va below VMEMMAP_START when calculating va for it's struct page.
For example, if phys_ram_base starts from 0x82000000 with pfn 0x82000, the
first page in the same section is actually pfn 0x80000. During
init_unavailage_range, we will initialize struct page for pfn 0x80000
with virtual address '(struct page *)VMEMMAP_START - 0x2000', which is
below VMEMMAP_START as well as PCI_IO_END.
This commit fixes this bug by aligning phys_ram_base with SECTION_SIZE.
Signed-off-by: Xu Lu <luxu.kernel at bytedance.com>
---
arch/riscv/mm/init.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 0e8c20adcd98..9866de267b74 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -59,6 +59,8 @@ EXPORT_SYMBOL(pgtable_l4_enabled);
EXPORT_SYMBOL(pgtable_l5_enabled);
#endif
+#define RISCV_MEMSTART_ALIGN (1UL << SECTION_SIZE_BITS)
+
phys_addr_t phys_ram_base __ro_after_init;
EXPORT_SYMBOL(phys_ram_base);
@@ -241,7 +243,8 @@ static void __init setup_bootmem(void)
* at worst, we map the linear mapping with PMD mappings.
*/
if (!IS_ENABLED(CONFIG_XIP_KERNEL))
- phys_ram_base = memblock_start_of_DRAM() & PMD_MASK;
+ phys_ram_base = round_down(memblock_start_of_DRAM(),
+ RISCV_MEMSTART_ALIGN);
/*
* In 64-bit, any use of __va/__pa before this point is wrong as we
--
2.20.1
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