[PATCH v4 7/7] riscv: dts: sophgo: cv1812h: add pinctrl support

[Thomas Bonnefille]

On 8/2/24 2:35 AM, Inochi Amaoto wrote:
> Add pinctrl node for CV1812H SoC.
>
> Signed-off-by: Inochi Amaoto <inochiama at outlook.com>
> ---
>   arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> index 8fcb400574ed..2dfa450f0d26 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> @@ -4,6 +4,7 @@
>    */
>
>   #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/pinctrl/pinctrl-cv1812h.h>
>   #include "cv18xx.dtsi"
>   #include "cv181x.dtsi"

Hello Inochi,
I'm trying to apply your patch to the LicheeRV Nano series but I can't 
find the file "cv181x.dtsi", neither in the upstream v6.11-rc5 nor in 
the additional required patch.
It was first mentioned in the v3 of your patch series.
Was it supposed to appear here ?

If so, can you help me figure out where to find it?

Regards,
Thomas

> @@ -14,6 +15,15 @@ memory at 80000000 {
>   		device_type = "memory";
>   		reg = <0x80000000 0x10000000>;
>   	};
> +
> +	soc {
> +		pinctrl: pinctrl at 3008000 {
> +			compatible = "sophgo,cv1812h-pinctrl";
> +			reg = <0x03001000 0x1000>,
> +			      <0x05027000 0x1000>;
> +			reg-names = "sys", "rtc";
> +		};
> +	};
>   };
>
>   &plic {
> --
> 2.46.0
>
>
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