[PATCH v4 0/7] riscv: sophgo: Add pinctrl support for CV1800 series SoC

[Inochi Amaoto]

On Fri, Aug 23, 2024 at 05:44:17PM GMT, Linus Walleij wrote:
> On Fri, Aug 2, 2024 at 2:34 AM Inochi Amaoto <inochiama at outlook.com> wrote:
> 
> > Add basic pinctrl driver for Sophgo CV1800 series SoCs.
> > This patch series aims to replace the previous patch from Jisheng [1].
> > Since the pinctrl of cv1800 has nested mux and its pin definination
> > is discrete, it is not suitable to use "pinctrl-single" to cover the
> > pinctrl device.
> >
> > This patch require another patch [2] that provides standard attribute
> > "input-schmitt-microvolt"
> >
> > Note: As current documentation is not enough to guess the pin
> > configuration of Huashan Pi, only the pinctrl node is added.
> >
> > [1] https://lore.kernel.org/linux-riscv/20231113005702.2467-1-jszhang@kernel.org/
> > [2] https://lore.kernel.org/all/IA1PR20MB495346246245074234D337A6BBAC2@IA1PR20MB4953.namprd20.prod.outlook.com/
> >
> > Changed from v3:
> > 1. binding: drop unnecessary type
> > 2. binding: use right ref for pin node.
> > 3. binding: remove mixed spaces and tabs.
> 
> This v4 looks good to me and has necessary ACKs.
> 
> It contains device tree patches which I am icky to merge but
> I can merge the rest and give you an immutable branch in the
> pinctrl tree that the ARM SoC maintainers can pull in to
> merge the device trees, does this work for you?
> 
> Yours,
> Linus Walleij

Hi, Linus

It is OK for me, Thanks for taking it.

Regard,
Inochi