[PATCH v1 0/9] Fix Allwinner D1 boot regression

[Anup Patel]

On Thu, Aug 15, 2024 at 7:41 PM Thomas Gleixner <tglx at linutronix.de> wrote:
>
> On Thu, Aug 15 2024 at 08:32, Samuel Holland wrote:
> > On 2024-08-15 8:16 AM, Thomas Gleixner wrote:
> >> Yes. So the riscv timer is not working on this thing or it stops
> >> somehow.
> >
> > That's correct. With the (firmware) devicetree that Emil is using, the OpenSBI
> > firmware does not have a timer device, so it does not expose the (optional[1])
> > SBI time extension, and sbi_set_timer() does nothing.
>
> Sigh. Does RISCV really have to repeat all mistakes which have been made
> by x86, ARM and others before? It's known for decades that the kernel
> relies on a working timer...

My apologies for the delay in finding a fix for this issue.

Almost all RISC-V platforms (except this one) have SBI Timer always
available and Linux uses a better timer or Sstc extension whenever
it is available.

When Emil first reported this issue, I did try to help him root cause
the issue but unfortunately I don't have this particular platform and
PLIC on all other RISC-V platforms works fine.

I am also surprised that none of the Allwiner folks tried helping.

>
> > I wrote a patch (not submitted) to skip registering riscv_clock_event when the
> > SBI time extension is unavailable, but this doesn't fully solve the issue
> > either, because then we have no clockevent at all when
> > check_unaligned_access_all_cpus() is called.
>
> check_unaligned_access_all_cpus() is irrelevant.
>
> > How early in the boot process are we "required" to have a functional clockevent?
> > Do we need to refactor check_unaligned_access_all_cpus() so it works on systems
> > where the only clockevent is provided by a platform device?
>
> Right after init/main::late_time_init() everything can depend on a
> working timer and on jiffies increasing.
>
> I'm actually surprised that the boot process gets that far. That's just
> by pure luck, really.
>
> Thanks,
>
>         tglx

Regards,
Anup