[PATCH v1 0/9] Fix Allwinner D1 boot regression
Emil Renner Berthing
emil.renner.berthing at canonical.com
Wed Aug 14 07:56:32 PDT 2024
Hi Anup,
As described in the thread below[1] I haven't been able to boot my
boards based on the Allwinner D1 SoC since 6.9 where you converted the
SiFive PLIC driver to a platform driver.
This is clearly a regression and there haven't really been much progress
on fixing the issue since then, so here is the revert that fixes it.
If no other fix is found before 6.11 I suggest we apply this.
[1]: https://lore.kernel.org/linux-riscv/CAJM55Z9hGKo4784N3s3DhWw=nMRKZKcmvZ58x7uVBghExhoc9A@mail.gmail.com/
/Emil
Emil Renner Berthing (9):
Revert "irqchip/sifive-plic: Chain to parent IRQ after handlers are
ready"
Revert "irqchip/sifive-plic: Avoid explicit cpumask allocation on
stack"
Revert "irqchip/sifive-plic: Improve locking safety by using
irqsave/irqrestore"
Revert "irqchip/sifive-plic: Parse number of interrupts and contexts
early in plic_probe()"
Revert "irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain
creation failure"
Revert "irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent
fwnode"
Revert "irqchip/sifive-plic: Use devm_xyz() for managed allocation"
Revert "irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz()"
Revert "irqchip/sifive-plic: Convert PLIC driver into a platform
driver"
drivers/irqchip/irq-sifive-plic.c | 296 ++++++++++++------------------
1 file changed, 117 insertions(+), 179 deletions(-)
--
2.43.0
More information about the linux-riscv
mailing list