[External] Re: [PATCH 1/2] ACPI: PPTT: Populate cacheinfo entirely with PPTT
yunhui cui
cuiyunhui at bytedance.com
Sat Apr 13 19:40:34 PDT 2024
Hi Sudeep,Jeremy,
On Sat, Apr 13, 2024 at 12:27 AM Sudeep Holla <sudeep.holla at arm.com> wrote:
>
> On Fri, Apr 12, 2024 at 05:08:01PM +0100, Sudeep Holla wrote:
> > diff --git i/arch/riscv/kernel/cacheinfo.c w/arch/riscv/kernel/cacheinfo.c
> > index 09e9b88110d1..92ab73ed5234 100644
> > --- i/arch/riscv/kernel/cacheinfo.c
> > +++ w/arch/riscv/kernel/cacheinfo.c
> > @@ -79,6 +79,27 @@ int populate_cache_leaves(unsigned int cpu)
> > struct device_node *prev = NULL;
> > int levels = 1, level = 1;
> >
> > + if (!acpi_disabled) {
> > + int ret, fw_levels, split_levels;
> > +
> > + ret = acpi_get_cache_info(cpu, &fw_levels, &split_levels);
> > + if (ret)
> > + return ret;
> > +
> > + /* must be set, so we can drop num_leaves assignment below */
> > + this_cpu_ci->num_leaves = fw_levels + split_levels;
> > +
> > + for (idx = 0; level <= this_cpu_ci->num_levels &&
> > + idx < this_cpu_ci->num_leaves; idx++, level++) {
> > + if (level <= split_levels) {
> > + ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
> > + ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
> > + } else {
> > + ci_leaf_init(this_leaf++, CACHE_TYPE_UNIFIED, level);
> > + }
> > + }
>
> Ofcourse we need to add here,
> return 0;
>
> > + }
> > +
> > if (of_property_read_bool(np, "cache-size"))
> > ci_leaf_init(this_leaf++, np, CACHE_TYPE_UNIFIED, level);
> > if (of_property_read_bool(np, "i-cache-size"))
> >
>
> --
> Regards,
> Sudeep
With this modification, I tested that I can obtain cacheinfo
correctly. If RISC-V later adds a new register describing the cache,
then we can continue to improve it in populate_cache_leaves().
Thank you for your comments and I will add you as Suggested-by in v2.
Thanks,
Yunhui
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