[PATCH 0/4] cache: sifive_ccache: Auxiliary device support

Conor Dooley conor.dooley at microchip.com
Fri Apr 12 05:51:45 PDT 2024


On Wed, Apr 10, 2024 at 04:22:02PM -0700, Samuel Holland wrote:
> As of commit c90847bcbfb6 ("cache: sifive_ccache: Partially convert to a
> platform driver"), the cache subsystem binds a platform driver to the
> Composable Cache's DT node. This prevents the perf subsystem from doing
> the same for the new PMU driver[1]. To allow using both drivers at the
> same time without conflicts or module linkage dependencies, attach the
> PMU driver to the auxiliary device bus. While at it, prepare to use the
> auxiliary device bus for the EDAC driver as well, which significantly
> simplifies that driver. The actual EDAC driver conversion has to wait
> another development cycle to avoid dependencies between git trees.


I'm not really keen on the partial conversion, I'd like to see a
complete conversion where the ccache driver calls
"sifive_register_ccache_pmu()" and "sifive_register_ccache_edac()"
and has no part in creating the aux device itself, like Philipp and
Stephen asked me to do here for the clock/reset drivers on PolarFire SoC:
https://lore.kernel.org/all/20240409-shallow-voice-c84ed791bc7d@spud/

Thanks,
Conor.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20240412/ad08f2d3/attachment.sig>


More information about the linux-riscv mailing list