[PATCH v3 1/2] riscv: nommu: remove PAGE_OFFSET hardcoding

[Clément Léger]

On 10/04/2024 17:30, Clément Léger wrote:
> 
> 
> On 10/04/2024 16:23, Jisheng Zhang wrote:
>> Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since
>> there's only one nommu platform in the mainline. However, there are
>> many cases where the (S)DRAM base address isn't 0x8000_0000, so remove
>> the hardcoding value, and introduce DRAM_BASE which will be set by
> 
> Hi Jisheng,
> 
> Typo: s/harcoding/hardcoded
> 
>> users during configuring. DRAM_BASE is 0x8000_0000 by default.
>>
>> Signed-off-by: Jisheng Zhang <jszhang at kernel.org>
>> ---
>>  arch/riscv/Kconfig | 8 +++++++-
>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index 7895c77545f1..b4af1df86352 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -247,10 +247,16 @@ config MMU
>>  	  Select if you want MMU-based virtualised addressing space
>>  	  support by paged memory management. If unsure, say 'Y'.
>>  
>> +if !MMU
>> +config DRAM_BASE
>> +	hex '(S)DRAM Base Address'
>> +	default 0x80000000
>> +endif
> 
> I'm not sure but it feels odd to have this at top level config menu.
> Maybe it would make more sense for this to be located under the
> "Platform Type" section ?
> 
> Thanks,
> 
> Clément
> 
>> +
>>  config PAGE_OFFSET
>>  	hex
>>  	default 0xC0000000 if 32BIT && MMU
>> -	default 0x80000000 if !MMU
>> +	default DRAM_BASE if !MMU
>>  	default 0xff60000000000000 if 64BIT

By the way, you should probably rebase that on top of Samuel's work [1]
in order to support !MMU is S-mode.

Thanks,

Clément

Link:
https://lore.kernel.org/lkml/20240227003630.3634533-5-samuel.holland@sifive.com/
[1]

>>  
>>  config KASAN_SHADOW_OFFSET