[PATCH bpf-next 2/5] riscv, bpf: Relax restrictions on Zbb instructions
Pu Lehui
pulehui at huaweicloud.com
Wed Apr 3 03:19:05 PDT 2024
On 2024/4/3 0:03, Daniel Borkmann wrote:
> On 4/2/24 4:27 PM, Björn Töpel wrote:
>> Pu Lehui <pulehui at huaweicloud.com> writes:
>>> From: Pu Lehui <pulehui at huawei.com>
>>>
>>> This patch relaxes the restrictions on the Zbb instructions. The
>>> hardware
>>> is capable of recognizing the Zbb instructions independently,
>>> eliminating
>>> the need for reliance on kernel compile configurations.
>>>
>>> Signed-off-by: Pu Lehui <pulehui at huawei.com>
>>
>> Should this patch really be part of this series?
>
> No, that should be submitted independently.
>
My initial thought was that I didn't enable CONFIG_RISCV_ISA_ZBB in
config.riscv64, so I should loosen this restriction to enable zbb
optimization. It could not be part of this series.
By the way, after reading what Conor and Björn said, I think we should
align with kernel sematic, that is, emit zbb when CONFIG_RISCV_ISA_ZBB
is enabled and so that if Zbb is detected they can be used.
> Also, given Eduard's comment, it would be great if you could add the
> instructions to tools/testing/selftests/bpf/README.rst even if not in
> a perfect shape, but it would give developers a chance to get started.
>
> Thanks,
> Daniel
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