[PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support
Ben Dooks
ben.dooks at codethink.co.uk
Fri Sep 22 02:41:04 PDT 2023
On 20/09/2023 07:40, Chen Wang wrote:
> From: Emil Renner Berthing <emil.renner.berthing at canonical.com>
>
> Add quirk to skip setting the input clock rate for the uarts on the
> Sophgo SG2042 SoC similar to the StarFive JH7100.
I'd love an actual explanation of why this is necessary here.
>
> Signed-off-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
> Signed-off-by: Chen Wang <wangchen20 at iscas.ac.cn>
> ---
> drivers/tty/serial/8250/8250_dw.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> index f4cafca1a7da..6c344877a07f 100644
> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -770,7 +770,7 @@ static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
> .quirks = DW_UART_QUIRK_IS_DMA_FC,
> };
>
> -static const struct dw8250_platform_data dw8250_starfive_jh7100_data = {
> +static const struct dw8250_platform_data dw8250_skip_set_rate_data = {
> .usr_reg = DW_UART_USR,
> .quirks = DW_UART_QUIRK_SKIP_SET_RATE,
> };
> @@ -780,7 +780,8 @@ static const struct of_device_id dw8250_of_match[] = {
> { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data },
> { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data },
> { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data },
> - { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data },
> + { .compatible = "sophgo,sg2042-uart", .data = &dw8250_skip_set_rate_data },
> + { .compatible = "starfive,jh7100-uart", .data = &dw8250_skip_set_rate_data },
> { /* Sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, dw8250_of_match);
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
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