[RFC PATCH v2 27/35] ACPICA: Add new MADT GICC flags fields [code first?]

[Salil Mehta]

> From: Rafael J. Wysocki <rafael at kernel.org>
> Sent: Friday, September 15, 2023 11:21 AM
> To: Salil Mehta <salil.mehta at huawei.com>
> Cc: Rafael J. Wysocki <rafael at kernel.org>; Russell King (Oracle)
> <linux at armlinux.org.uk>; Ard Biesheuvel <ardb at kernel.org>; Jonathan Cameron
> <jonathan.cameron at huawei.com>; James Morse <james.morse at arm.com>; linux-
> pm at vger.kernel.org; loongarch at lists.linux.dev; linux-acpi at vger.kernel.org;
> linux-arch at vger.kernel.org; linux-kernel at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; linux-riscv at lists.infradead.org;
> kvmarm at lists.linux.dev; x86 at kernel.org; Jean-Philippe Brucker <jean-
> philippe at linaro.org>; jianyong.wu at arm.com; justin.he at arm.com
> Subject: Re: [RFC PATCH v2 27/35] ACPICA: Add new MADT GICC flags fields
> [code first?]
> 
> On Fri, Sep 15, 2023 at 11:34 AM Salil Mehta <salil.mehta at huawei.com>
> wrote:
> >
> >
> > > From: Rafael J. Wysocki <rafael at kernel.org>
> > > Sent: Friday, September 15, 2023 9:45 AM
> > > To: Russell King (Oracle) <linux at armlinux.org.uk>
> > > Cc: Salil Mehta <salil.mehta at huawei.com>; Ard Biesheuvel <ardb at kernel.org>;
> > > Jonathan Cameron <jonathan.cameron at huawei.com>; James Morse 
> > > <james.morse at arm.com>; linux-pm at vger.kernel.org; loongarch at lists.linux.dev;
> > > linux-acpi at vger.kernel.org; linux-arch at vger.kernel.org; linux-
> > > kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux-
> > > riscv at lists.infradead.org; kvmarm at lists.linux.dev; x86 at kernel.org;
> Jean-
> > > Philippe Brucker <jean-philippe at linaro.org>; jianyong.wu at arm.com;
> > > justin.he at arm.com
> > > Subject: Re: [RFC PATCH v2 27/35] ACPICA: Add new MADT GICC flags
> fields
> > > [code first?]
> > >
> > > On Fri, Sep 15, 2023 at 9:09 AM Russell King (Oracle)
> > > <linux at armlinux.org.uk> wrote:
> > > >
> > > > On Fri, Sep 15, 2023 at 02:29:13AM +0000, Salil Mehta wrote:
> > > > > On x86, during init, if the MADT entry for LAPIC is found to be
> > > > > online-capable and is enabled as well then possible and present
> > > >
> > > > Note that the ACPI spec says enabled + online-capable isn't defined.
> > > >
> > > > "The information conveyed by this bit depends on the value of the
> > > > Enabled bit. If the Enabled bit is set, this bit is reserved and
> > > > must be zero."
> > > >
> > > > So, if x86 is doing something with the enabled && online-capable
> > > > state (other than ignoring the online-capable) then technically it
> > > > is doing something that the spec doesn't define
> > >
> > > And so it is wrong.
> >
> >
> > Or maybe, specification has not been updated yet. code-first?
> 
> Well, if you are aware of any change requests related to this and
> posted as code-first, please let me know.

I am not aware of any on x86. Maybe we can do it on ARM first and
let other Arch pitch-in their objection later? Afterall, there is
a legitimate use-case in case of ARM. Having mutually exclusive
bits breaks certain use-cases and we have to do the tradeoffs. 

This can be done in parallel while other patches are getting
reviewed and momentarily living with the tradeoffs till
specification is sorted. But of course it depends upon what
other stake holders and most importantly what ARM Arch people
think of it.

Thanks
Salil.