[RFC PATCH 0/6] RISC-V BLAKE2s Vector implementation

[Conor Dooley]

On Thu, Sep 14, 2023 at 04:15:10PM +0200, Björn Töpel wrote:
> Conor Dooley <conor.dooley at microchip.com> writes:
> 
> > On Thu, Sep 14, 2023 at 02:59:30PM +0200, Björn Töpel wrote:
> >> Conor Dooley <conor.dooley at microchip.com> writes:
> >> 
> >> > On Tue, Sep 12, 2023 at 01:57:22PM +0200, Björn Töpel wrote:
> >> >> From: Björn Töpel <bjorn at rivosinc.com>
> >> >> 
> >> >> Hi,
> >> >> 
> >> >> This is Andy's kernel mode vector V2 series [1], with my BLAKE2s
> >> >> AVX-512-to-RISC-V translation patch appended.
> >> >> 
> >> >> I've tagged it as RFC, since Andy's series is still not in-tree yet.
> >> >> 
> >> >> It's a first step towards a Vector aided Wireguard! ;-)
> >> >
> >> > This has the same problems as Andy's stuff & doesn't build properly for the
> >> > automation. What is the plan between yourself and Andy for submitting a
> >> > version of the in-kernel vector support that passes build testing?
> >> 
> >> I'll synch up with Andy! I'm not even sure the blake2s patch should part
> >> of the "in-kernel vector" series at all.
> >
> > The in-kernel vector stuff should come with a user, otherwise it's dead
> > code :)
> 
> Sure, just so we're on the same page; Patch 3 (Vector XOR) is a user
> from my perspective, no?

D'oh
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