[PATCH v6 0/4] riscv: tlb flush improvements
Nadav Amit
nadav.amit at gmail.com
Mon Oct 30 07:01:48 PDT 2023
> On Oct 30, 2023, at 3:30 PM, Alexandre Ghiti <alexghiti at rivosinc.com> wrote:
>
> + on_each_cpu_mask(cmask,
> + __ipi_flush_tlb_range_asid,
> + &ftd, 1);
>
Unrelated, but having fed on the stack might cause it to be unaligned to
the cacheline, which in x86 we have seen introduces some overhead.
Actually, it is best not to put it on the stack, if possible to reduce
cache traffic.
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