[PATCH 2/3] riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM
Samuel Holland
samuel.holland at sifive.com
Tue Oct 17 19:36:24 PDT 2023
On 2023-10-17 8:59 AM, Christoph Hellwig wrote:
> RISCV_DMA_NONCOHERENT is also used for whacky non-standard
> non-coherent ops that use different hooks in dma-direct.
>
> Signed-off-by: Christoph Hellwig <hch at lst.de>
> Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
> Reviewed-by: Robin Murphy <robin.murphy at arm.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
> ---
> arch/riscv/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 0ac0b538379718..9c48fecc671918 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -273,7 +273,6 @@ config RISCV_DMA_NONCOHERENT
> select ARCH_HAS_SYNC_DMA_FOR_CPU
> select ARCH_HAS_SYNC_DMA_FOR_DEVICE
> select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
> - select DMA_DIRECT_REMAP if MMU
This breaks ERRATA_THEAD_CMO, which also needs a `select DMA_DIRECT_REMAP`:
riscv64-unknown-linux-gnu-ld: kernel/dma/direct.o: in function `.L131':
direct.c:(.text+0x42a): undefined reference to `arch_dma_alloc'
riscv64-unknown-linux-gnu-ld: kernel/dma/direct.o: in function `.L192':
direct.c:(.text+0x592): undefined reference to `arch_dma_free'
> config RISCV_NONSTANDARD_CACHE_OPS
> bool
> @@ -549,6 +548,7 @@ config RISCV_ISA_ZICBOM
> depends on RISCV_ALTERNATIVE
> default y
> select RISCV_DMA_NONCOHERENT
> + select DMA_DIRECT_REMAP
> help
> Adds support to dynamically detect the presence of the ZICBOM
> extension (Cache Block Management Operations) and enable its
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