[PATCH v3 -next 3/3] RISC-V: cacheflush: Initialize CBO variables on ACPI systems
Andrew Jones
ajones at ventanamicro.com
Tue Oct 17 01:41:02 PDT 2023
On Mon, Oct 16, 2023 at 10:19:58PM +0530, Sunil V L wrote:
> Initialize the CBO variables on ACPI based systems using information in
> RHCT.
>
> Signed-off-by: Sunil V L <sunilvl at ventanamicro.com>
> ---
> arch/riscv/mm/cacheflush.c | 25 +++++++++++++++++++------
> 1 file changed, 19 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
> index f1387272a551..55a34f2020a8 100644
> --- a/arch/riscv/mm/cacheflush.c
> +++ b/arch/riscv/mm/cacheflush.c
> @@ -3,7 +3,9 @@
> * Copyright (C) 2017 SiFive
> */
>
> +#include <linux/acpi.h>
> #include <linux/of.h>
> +#include <asm/acpi.h>
> #include <asm/cacheflush.h>
>
> #ifdef CONFIG_SMP
> @@ -124,13 +126,24 @@ void __init riscv_init_cbo_blocksizes(void)
> unsigned long cbom_hartid, cboz_hartid;
> u32 cbom_block_size = 0, cboz_block_size = 0;
> struct device_node *node;
> + struct acpi_table_header *rhct;
> + acpi_status status;
> +
> + if (acpi_disabled) {
> + for_each_of_cpu_node(node) {
> + /* set block-size for cbom and/or cboz extension if available */
> + cbo_get_block_size(node, "riscv,cbom-block-size",
> + &cbom_block_size, &cbom_hartid);
> + cbo_get_block_size(node, "riscv,cboz-block-size",
> + &cboz_block_size, &cboz_hartid);
> + }
> + } else {
> + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct);
> + if (ACPI_FAILURE(status))
> + return;
>
> - for_each_of_cpu_node(node) {
> - /* set block-size for cbom and/or cboz extension if available */
> - cbo_get_block_size(node, "riscv,cbom-block-size",
> - &cbom_block_size, &cbom_hartid);
> - cbo_get_block_size(node, "riscv,cboz-block-size",
> - &cboz_block_size, &cboz_hartid);
> + acpi_get_cbo_block_size(rhct, &cbom_block_size, &cboz_block_size, NULL);
> + acpi_put_table((struct acpi_table_header *)rhct);
> }
>
> if (cbom_block_size)
> --
> 2.39.2
>
Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
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