[PATCH] dt-bindings: cache: andestech,ax45mp-cache: Fix unit address in example
Krzysztof Kozlowski
krzysztof.kozlowski at linaro.org
Tue Oct 3 04:11:58 PDT 2023
On 03/10/2023 12:47, Geert Uytterhoeven wrote:
> The unit address in the example does not match the reg property.
> Correct the unit address to match reality.
>
> Fixes: 3e7bf4685e42786d ("dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller")
> Signed-off-by: Geert Uytterhoeven <geert+renesas at glider.be>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
Best regards,
Krzysztof
More information about the linux-riscv
mailing list