[PATCH 4/5] riscv: dts: sophgo: add initial CV1800B SoC device tree

[Inochi Amaoto]

>
>>On Sun, Oct 01, 2023 at 06:34:21AM +0800, Inochi Amaoto wrote:
>>> Hi, Jisheng
>>
>>>> Add initial device tree for the CV1800B RISC-V SoC by SOPHGO.
>>
>>>
>>> You add the clint dt-bindings of CV1800B clint, but I don't see the clint
>>> node in this dt. The SBI needs this clint node to provide timer for linux.
>>> AFAIK, the dt of SBI comes from the linux or the bootloader, and bootloader
>>> may load the linux dt and pass it to the SBI. I think it is better to add
>>> the clint node.
>>
>>> In addition, please separate the peripheral node to a different file, which
>>> can be reused by both the CV1800 series and CV1810 series.
>>
>>How do these SoCs differ?
>
>AFAIK, the most peripheral of CV1800 and CV1810 are the same. there are
>only a few difference between CV1800 and CV1810:
>1. CV1810 have mmc interrupt, but CV1800 have none
>2. CV1810 have more RAM and a more powerful TPU.
>3. Some models of CV1810 support I2S.
>
>Also is some you have already mentioned, the video capabilities (including
>encoding, output steam number, input steam number) are different.
>
>The only board with a CV1800 soc is Huashan Pi (CV1812H).
>

A mistake, I mean CV1810 soc, not the CV1800 one.

>>Documentation seems rather lacking, but I was able to find something on
>>github that suggests there is also a cv180zb. The difference between the
>>three seems to, from a quick look, be their video encoding capabilities.
>>Is that correct?
>>
>
>Yes. it is correct.
>It seems like you have forgot a chip called CV1801B, which has 128MB
>RAM. But I see no board with this soc, so at now it is not necessary to
>care it.
>
>