[PATCH v1] RISC-V: convert new selectors of RISCV_ALTERNATIVE to dependencies

Conor Dooley conor.dooley at microchip.com
Fri Mar 24 05:12:41 PDT 2023


for-next contains two additional extensions that select
RISCV_ALTERNATIVE. RISCV_ALTERNATIVE no longer needs to be selected by
individual config options as it is now selected for !XIP_KERNEL builds
by the top level RISCV option.
These extensions rely on the alternative framework, so convert the
"select"s to "depends on"s instead.

Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
---
Applies on top of my series doing the aforementioned conversion:
https://lore.kernel.org/all/20230324100538.3514663-3-conor.dooley@microchip.com/

This patch is sent on its own, because I expect the others to be applied
to fixes, as it fixes a v6.3 regression.
For this patch, I applied my other series to v6.3-rc1 and merged that
into for-next, and created this patch on top of the result.
---
 arch/riscv/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d2acd69d6e3e..a48d1ee677ec 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -402,8 +402,8 @@ config RISCV_ISA_C
 config RISCV_ISA_SVNAPOT
 	bool "SVNAPOT extension support"
 	depends on 64BIT && MMU
+	depends on RISCV_ALTERNATIVE
 	default y
-	select RISCV_ALTERNATIVE
 	help
 	  Allow kernel to detect the SVNAPOT ISA-extension dynamically at boot
 	  time and enable its usage.
@@ -478,8 +478,8 @@ config RISCV_ISA_ZICBOM
 
 config RISCV_ISA_ZICBOZ
 	bool "Zicboz extension support for faster zeroing of memory"
-	depends on !XIP_KERNEL && MMU
-	select RISCV_ALTERNATIVE
+	depends on MMU
+	depends on RISCV_ALTERNATIVE
 	default y
 	help
 	   Enable the use of the ZICBOZ extension (cbo.zero instruction)
-- 
2.39.2




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