[PATCH v6 00/21] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC

Stephen Boyd sboyd at kernel.org
Wed Mar 22 16:53:23 PDT 2023


Quoting Conor Dooley (2023-03-22 14:06:00)
> On Tue, Mar 21, 2023 at 04:57:52PM -0700, Stephen Boyd wrote:
> > Quoting Conor Dooley (2023-03-21 16:03:54)
> > > 
> > > If you're happy on the driver side of things, do you want to pick those
> > > patches up on top of the bindings and send a PR to Stephen?
> > 
> > This sounds fine to me. Let me know if you plan to send a PR with the
> > starfive clk bits.
> 
> Since it was off-list:
> Emil and I spoke about this briefly today at the weekly linux-riscv
> meeting, the upshot of which is that it is likely to be me, rather than
> him, sending you a PR as he's pretty busy at the moment.
> That said, Emil mentioned that he has some doubts as to whether the
> bindings are correct, and from taking a look - he's right, so there'll
> likely not be a PR just yet! I'll go leave a comment about that...
> 
> I've got no real desire to maintain these drivers going forward though,
> so perhaps Hal, or one of the other StarFive folks, can get themselves
> set up to send them to you going forwards?
> 

Sure, or I can apply them myself based on some branch you provide that
has the required header files. It doesn't really matter as long as I
know what's going on.



More information about the linux-riscv mailing list