On 16/03/2023 04:05, Xingyu Wu wrote: > Add PLL clock inputs from PLL clock generator. > > Signed-off-by: Xingyu Wu <xingyu.wu at starfivetech.com> > --- Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org> Best regards, Krzysztof