[PATCH v3 00/11] Add new partial clock and reset drivers for StarFive JH7110

[Conor Dooley]

On Wed, Mar 15, 2023 at 03:40:00PM -0700, Stephen Boyd wrote:
> Quoting Conor Dooley (2023-03-15 01:14:06)

> > At what point does that become too much to go via soc and some sort of
> > shared tag become needed?

> BTW, clk driver code doesn't typically go via soc. Not sure if that's
> happening but please don't do that.

Perfect, shan't.

> Platform/SoC maintainers either base their DTS file branch on some
> branch made in clk repo that has the bindings and drivers they need
> (clk-starfive probably), or they send a pull request to clk maintainers
> with the bindings and clk drivers. Or they don't use the #defines in the
> header files and use raw numbers in the DTS, or they simply apply the
> patch that just has the #defines in it to their SoC tree and we
> duplicate the commit in the history by also applying it to the clk tree.
> 

> Let's try to keep things simple and not use raw numbers.

Definitely not!

I'll do something sane with Emil once the base series is ready.
Just was not sure how you typically liked this stuff to go, and now I am
sure of what you do not want!

Thanks,
Conor.
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