[PATCH v2 1/3] dt-bindings: phy: Add StarFive JH7110 USB dt-binding
Minda Chen
minda.chen at starfivetech.com
Fri Mar 10 00:01:45 PST 2023
On 2023/3/9 18:07, Krzysztof Kozlowski wrote:
> On 08/03/2023 09:27, Minda Chen wrote:
>> Add StarFive JH7110 SoC USB 3.0 phy dt-binding.
>> USB controller is cadence USB 3.0 IP.
>
> Subject: drop second/last, redundant "binding". The "dt-bindings" prefix
> is already stating that these are bindings.
>
>>
>> Signed-off-by: Minda Chen <minda.chen at starfivetech.com>
>> ---
>> .../bindings/phy/starfive,jh7110-usb-phy.yaml | 158 ++++++++++++++++++
>> 1 file changed, 158 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
>> new file mode 100644
>> index 000000000000..daa88d065deb
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
>> @@ -0,0 +1,158 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-phy.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive USB 2.0 and 3.0 PHY
>> +
>> +maintainers:
>> + - Minda Chen<minda.chen at starfivetech.com>
>
> Missing space
>
>> +
>> +properties:
>> + compatible:
>> + items:
>
> Drop items, it's just one item.
>
>
>> + - const: starfive,jh7110-usb
>> +
>> + reg:
>> + maxItems: 2
>> +
>> + reg-names:
>> + items:
>> + - const: usb3
>> + - const: usb2
>> +
>> + clocks:
>> + items:
>> + - description: usb 125m clock
>> + - description: app 125m clock
>> + - description: lpm clock
>> + - description: stb clock
>> + - description: apb clock
>> + - description: axi clock
>> + - description: utmi apb clock
>> +
>> + clock-names:
>> + items:
>> + - const: usb_125m
>> + - const: usb0_app_125
>> + - const: usb0_lpm
>> + - const: usb0_stb
>> + - const: usb0_apb
>> + - const: usb0_axi
>> + - const: usb0_utmi_apb
>> +
>> + resets:
>> + items:
>> + - description: USB0_PWRUP reset
>> + - description: USB0_APB reset
>> + - description: USB0_AXI reset
>> + - description: USB0_UTMI_APB reset
>> +
>> + starfive,sys-syscon:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>> + items:
>> + items:
>> + - description: phandle to System Register Controller sys_syscon node.
>> + - description: offset of SYS_SYSCONSAIF__SYSCFG register for USB.
>> + description:
>> + The phandle to System Register Controller syscon node and the offset
>> + of SYS_SYSCONSAIF__SYSCFG register for USB.
>> +
>> + starfive,stg-syscon:
>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>> + items:
>> + items:
>> + - description: phandle to System Register Controller stg_syscon node.
>> + - description: register0 offset of STG_SYSCONSAIF__SYSCFG register for USB.
>> + - description: register1 offset of STG_SYSCONSAIF__SYSCFG register for USB.
>> + - description: register2 offset of STG_SYSCONSAIF__SYSCFG register for USB.
>> + - description: register3 offset of STG_SYSCONSAIF__SYSCFG register for USB.
>> + description:
>> + The phandle to System Register Controller syscon node and the offset
>> + of STG_SYSCONSAIF__SYSCFG register for USB. Total 4 regsisters offset
>> + for USB.
>> +
>> + dr_mode:
>> + description: PHY mode.
>> + enum:
>> + - host
>> + - peripheral
>> + - otg
>> +
>> + "#address-cells":
>> + maximum: 2
>> +
>> + "#size-cells":
>> + maximum: 2
>> +
>> + ranges: true
>> +
>> + starfive,usb2-only:
>> + type: boolean
>> + description: Set USB using usb 2.0 phy. Supprt USB 2.0 only
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - reg-names
>> + - clocks
>> + - clock-names
>> + - resets
>> + - starfive,sys-syscon
>> + - starfive,stg-syscon
>> + - dr_mode
>> + - "#address-cells"
>> + - "#size-cells"
>> + - ranges
>> +
>> +patternProperties:
>
> This goes before required block
>
>> + "^usb@[0-9a-f]+$":
>> + type: object
>> + description: |
>> + usbphy node should have '1' usb controller subnode.
>> + It could be Cadence USB3 DRD controller.
>> + Cadence USB3 should follow the bindings specified in
>> + Documentation/devicetree/bindings/usb/cdns,usb3.yaml
>
> $ref instead of free form text
>
>
ok, thanks. Next version I will follow the comments to change.
> Best regards,
> Krzysztof
>
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