[PATCH 2/2] riscv: mm: add pgprot_dmacoherent for zicbom

[Ben Dooks]

On 08/03/2023 13:19, heiko at sntech.de wrote:
> Am Mittwoch, 8. März 2023, 10:35:14 CET schrieb Ben Dooks:
>> On 07/03/2023 20:58, Ben Dooks wrote:
>>> If the system uses both ZICBOM and SVPBMT then currently SVPBMT will be
>>> used for DMA allocated memory even though ZICBOM gives us the cache ops
>>> to use cached memory and clean/flush them as needed by the DMA code.
>>>
>>> Fix this by adding pgprot_dmacoherent() which is used by the allocator
>>> code to map the dma memory, thus allowing the return of suitably mapped
>>> memory for any use of dma_alloc_attrs() code. This s uses the added
>>> riscv_page_dmacoherent() which will work out the correct page flags to
>>> return using ALT_SVPBMT_ZICBOM() to runtime patch the right result.
>>>
>>> Note, we can't just disable SVPBMT as it will be neede for things like
>>> ioremap() which don't have assoicated cache management operations.
>>>
>>> Signed-off-by: Ben Dooks <ben.dooks at codethink.co.uk>
>>> ---
>>>    arch/riscv/include/asm/errata_list.h | 16 ++++++++++++++++
>>>    arch/riscv/include/asm/pgtable-64.h  | 10 ++++++++++
>>>    2 files changed, 26 insertions(+)
>>>
>>> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
>>> index fb1a810f3d8c..49ed2e7984a7 100644
>>> --- a/arch/riscv/include/asm/errata_list.h
>>> +++ b/arch/riscv/include/asm/errata_list.h
>>> @@ -62,6 +62,22 @@ asm(ALTERNATIVE_2("li %0, 0\t\nnop",					\
>>>    		  "I"(ALT_SVPBMT_SHIFT),				\
>>>    		  "I"(ALT_THEAD_PBMT_SHIFT))
>>>    
>>> +#define ALT_SVPBMT_ZICBOM(_val, prot)					\
>>> +asm(ALTERNATIVE_3("li %0, 0\t\nnop",					\
>>> +		  "li %0, %1\t\nslli %0,%0,%3", 0,			\
>>> +			RISCV_ISA_EXT_SVPBMT, CONFIG_RISCV_ISA_SVPBMT,	\
>>> +		  "li %0, 0\t\nnop", 0,					\
>>> +			RISCV_ISA_EXT_ZICBOM, CONFIG_RISCV_ISA_ZICBOM,	\
>>
>> so, I tink this needs to be selected on CONFIG_RISCV_DMA_NONCOHERENT
>> as just having ZICBOM in the ISA isn't enough to actually use it, you'll
>> need the dma-noncoherent.o being built to do the cache management.
> 
> CONFIG_RISCV_ISA_ZICBOM does a
> 	select RISCV_DMA_NONCOHERENT
> same as CONFIG_ERRATA_THEAD_CMO
> 
> So dma-noncoherent gets build if you enable at least one of them.
> What am I missing?

Ah, I think (and Connor also pointed out) that currently the config
is selceted from either user of the dma-noncoherent.c code. I think
thereore we can probably keep this as is.

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

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