[PATCH v14 1/3] riscv: mm: modify pte format for Svnapot

[Qinglin Pan]

On 3/8/23 5:09 PM, Conor Dooley wrote:
> On Wed, Mar 08, 2023 at 03:48:51PM +0800, Qinglin Pan wrote:
>> From: Qinglin Pan <panqinglin2020 at iscas.ac.cn>
>>
>> Add one alternative to enable/disable svnapot support, enable this static
>> key when "svnapot" is in the "riscv,isa" field of fdt and SVNAPOT compile
>> option is set. It will influence the behavior of has_svnapot. All code
>> dependent on svnapot should make sure that has_svnapot return true firstly.
>>
>> Modify PTE definition for Svnapot, and creates some functions in pgtable.h
>> to mark a PTE as napot and check if it is a Svnapot PTE. Until now, only
>> 64KB napot size is supported in spec, so some macros has only 64KB version.
>>
>> Signed-off-by: Qinglin Pan <panqinglin00 at gmail.com>
>> Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
>> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
>> index e3021b2590de..ba9f4650f051 100644
>> --- a/arch/riscv/include/asm/hwcap.h
>> +++ b/arch/riscv/include/asm/hwcap.h
>> @@ -42,9 +42,10 @@
>>   #define RISCV_ISA_EXT_ZBB		30
>>   #define RISCV_ISA_EXT_ZICBOM		31
>>   #define RISCV_ISA_EXT_ZIHINTPAUSE	32
>> +#define RISCV_ISA_EXT_SVNAPOT		33
>>   
>>   #define RISCV_ISA_EXT_MAX		64
> 
>> -#define RISCV_ISA_EXT_NAME_LEN_MAX	32
>> +#define RISCV_ISA_EXT_NAME_LEN_MAX	33
> 
> I think this change is not needed.

Hi Conor,

You are right. I change this by mistake..
A v15 will be sent out two days later :)

Thanks,
Qinglin.