[PATCH v3 1/3] clk: k210: remove an implicit 64-bit division

[Stephen Boyd]

Quoting Conor Dooley (2023-03-06 14:35:01)
> On Mon, Mar 06, 2023 at 02:31:00PM -0800, Stephen Boyd wrote:
> > Quoting Jesse Taube (2023-02-28 16:26:55)
> > > diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c
> > > index 67a7cb3503c3..4eed667eddaf 100644
> > > --- a/drivers/clk/clk-k210.c
> > > +++ b/drivers/clk/clk-k210.c
> > > @@ -495,7 +495,7 @@ static unsigned long k210_pll_get_rate(struct clk_hw *hw,
> > >         f = FIELD_GET(K210_PLL_CLKF, reg) + 1;
> > >         od = FIELD_GET(K210_PLL_CLKOD, reg) + 1;
> > >  
> > > -       return (u64)parent_rate * f / (r * od);
> > > +       return div_u64((u64)parent_rate * f, r * od);
> > 
> > The equation 'r * od' can't overflow 32-bits, right?
> 
> Yah, I checked that when writing the patch. They're 4-bit fields:

Awesome